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10.1 · The 1T1C cell — charge on a capacitor

Section titled “10.1 · The 1T1C cell — charge on a capacitor”

The memory on a RAM stick is DRAM, and its genius is brutal simplicity: store each bit as a charge on a tiny capacitor guarded by one transistor — one transistor plus one capacitor (1T1C), about six times denser than SRAM. The word line switches the access transistor on, the bit line then charges the capacitor (a 1) or drains it (a 0), and switching the transistor off traps the charge.

The 1T1C cell — charge on a capacitor

10.2 · Why “dynamic”: charge leaks → refresh

Section titled “10.2 · Why “dynamic”: charge leaks → refresh”

It is called dynamic because real capacitors leak. A DRAM bit fades within milliseconds, so the whole chip must be read and rewritten — refreshed — thousands of times a second, and it loses everything the moment power is cut (it is volatile). This constant refresh is the price paid for extreme density.

Why “dynamic”: charge leaks → refresh