The latch — storing 1 bit
8.1 · SR latch: cross-coupled NOR gates
Section titled “8.1 · SR latch: cross-coupled NOR gates”Every gate so far is combinational: its output depends only on its present inputs. To remember, a circuit needs feedback — looping an output back to an input so it holds a value. Cross-couple two NOR gates and you get an SR latch, the simplest 1-bit memory: pulsing S sets the stored bit Q to 1, pulsing R resets it to 0, and with both inputs at rest the loop holds whatever was last written.
8.2 · Refinement: the gated D latch
Section titled “8.2 · Refinement: the gated D latch”The raw SR latch is awkward (setting both inputs at once is illegal), so it is refined. Adding an enable line makes a gated latch that only listens when allowed, and feeding a single Data line through it gives the D latch: while enabled, Q simply follows D, storing exactly the bit you present with no illegal states.